FOURTH INTERNATIONAL SYMPOSIUM ON QUANTITATIVE CODESIGN OF SUPERCOMPUTERS

Co-located with the Supercomputing 2024 conference to be held in Atlanta, GA on November 17, 2024

This symposium considers combining two methodologies— collaborative codesign and data-driven analysis—to realize the full potential of supercomputing. Our scope includes applications, system software, workflows, health of hardware. Today’s HPC centers store vast sums of information, yet using this data presents demanding challenges. Much of the data-driven challenge has to do with discovering, accessing, and analyzing the right data. Codesign also presents formidable challenges. For example, how can a codesign development use the data collected on current systems to facilitate the design of next-generation supercomputers and successfully support our upcoming environments. Quantitative codesign offers a collaborative evidence-based approach to address our existing needs and our upcoming ambitions. This symposium will bring together leaders in the field to review current efforts across centers and discuss areas that show potential.

This year, our theme is on opportunities and challenges in ADVANCED MEMORY. There are new research topics in heterogeneous computing, energy efficient computing performance, AI architectures, and edge computing that are driving innovations in advanced memory technology. Generative AI, Foundation Models, and HPC are important drivers for performance improvements in high bandwidth memory.  Growing industry support and adoption of Compute Express Link (CXL) is driving interesting codesign explorations with various application drivers for CXL capabilities including: multi-tiered memory hierarchy, memory disaggregation large memory pools with global fabric attached memory, support for heterogeneous computing with shared memory pools, and revisited concepts for compute near memory designs.  In shared memory, application codesign tradeoffs are raised for hardware vs software coherency and consistency management. New codesign opportunities also arise to understand memory requirements for Federated Learning at low power edge devices.

Thank you and I hope to see you in Atlanta in November! –– Terry Jones, Symposium Chair